We will need three flip-flops to give the necessary eight states from 000 (state 0) through to 111 (state 7). We begin by, as shown in Table 7.1, listing the eight possible present states of the circuit alongside the next states that must follow. The design task is to use the present state outputs from the three flip-flops to produce the required next states for the three flip-flops.
Since we are using D-type flip-flops and their outputs will equal their inputs when clocked (i.e. the next state equation is Q+=D)t we must simply ensure that the present states are used to produce the required next state for each flip-flop. This is easily achieved by producing a Karnaugh map for each of the three flip- flop's D-inputs in terms of the (present) outputs of the three flip-flops.
These Karnaugh maps are also shown in Table 7.1 and are (because the output of a D-type simply follows its input, i.e. Q+=D) just the required next states for the circuit entered across the three maps as functions of the circuit's present states.
To complete the design we simply need to use the Karnaugh maps to simplify the required steering logic they define. This gives:
The circuit to implement this is shown in Fig. 7.4.