The previous example introduced the idea of stable and unstable total states. Using the circuit shown in Fig. 5.5 we now look at how asynchronous sequential circuits have the potential to possess memory. This circuit has two external inputs and a single internal input which feed into a three-input OR gate.
If either A or B are 1 then 1, and so 1 which has no effect on the output, hence the circuit is stable. If A and B are both 0 then:
so the circuit is again stable but whether the output is 0 or 1 depends upon what the output was before both external inputs went to 0. Hence the circuit his memory since its output under these input conditions depends upon what state it was in beforehand (i.e. whether Y was 0 or 1).
However, since for any external inputs other than A =0 and the output is always 1, this means when ^ and 5 do both equal 0 the output will still always
Referring to the Karnaugh map in Fig. 5.5 we see that when either A or B are 1 the stable state is when y= Y=1. This is because for these inputs the 1’s in the top row(y, indicate that the output, Y, is 1, which will then feed back making y= 1 and so causing the state of the circuit to ‘move’ to the bottom row of the truth table where the states are stable since then y=Y=1. The idea that each cell of the Karnaugh map contains a state of the circuit which will be stable if y= Y，or else is unstable (such as when the top row contains a 1) is central to the analysis and design of asynchronous sequential circuits.
For A and B both 0, an output of either 0 or 1 gives a stable condition (since the output simply equals the internal input). However, when the external inputs are changed this effectively causes a horizontal movement across the Karnaugh map (as each column represents one of the possible input conditions) to a new cell and hence state. Now, since the only stable states are for y~ 1 (the bottom row) this means that horizontal movement in the map, as the inputs change, will always be within the bottom row. Consequently for A and B both 0, movement will always be to cell (ABy)t and so the output will be 1. The lack of stable states for which y=0when A or B are 1 means that as soon as either of the external inputs are 1 the circuit is confined to operate within the bottom row of the Karnaugh map. So the circuit will never give an output of 0.
The concept of the circuit moving within the Karnaugh map from state to state (cell to cell) is vital to understanding the analysis and design of these circuits. Changes in the external variables cause horizontal movement in the map (to a new column and hence input condition), whilst changes from an unstable to stable state (for fixed external inputs, i.e. within a column) cause vertical movement.