Because all 2m possible combinations of the m control lines of a multiplexer are fed to 2m AND gates then there is an AND gate for all of the fundamental product terms of the m variables. A multiplexer therefore provides a way of synthesizing the logic function of any m-input truth table in fundamental sum of products form. AJJ that has U> be (done is to conn ect the input lines of the multiplexer to either 0 or 1 depending upon the desired output for the particular fundamental product. So any m-input (w-row) truth table can be implemented by a n-input multiplexer The advantage of this type of implementation of a combinational logic circuit is that it requires only a single circuit element and that no minimisation is required since the circuit in fundamental sum of product from.
Implement the truth table in Table 4.1 using a multiplexer.
This will require a 4-to-1 multiplexer (i. e. two control inputs) with inputs DQ through to D3 tied to 1, 0, 1 and 1, respectively (i.e. the output from the truth table) as shown in Fig. 4.5.
Furthermore, an w-input multiplexer and an inverter can be used to implement any row truth table. To achieve this all inputs to the truth table except are connected to the multiplexers control lines. This means that each AND gate is now activated for two rows of the truth table, i.e. two input patterns differing in the variable not connected to a control line.
These two rows have four possible output combinations: both 0; both 1; one 0 and the other 1; or vice versa. For the same value in both rows the activated AND gate can be tied to either 0 or 1 as required, whilst for different values it can be connected to the least significant input or its inverse (this is why the inverter is needed).